With a market for hardware embedded system larger than 100 billion USD, the protection of these systems against various threats has become a significant issue. The vulnerability of the microsystems against side attacks has been evidenced by P. Kocher in 1998. Side-attacks rely on the recognition of the “signatures” of data transfers and of executed instructions, typically by correlation analysis. The analysis essentially involves the correlation between of the waveforms of the power (current) consumption.

The protections against this type of attack use cryptographic methods, hardware methods that try to mask the pattern of the current consumption, and a combination of them. Examples of hardware methods comprise the use of dummy circuits that are randomly switched on to modify the power consumption and the use of random generators injecting noise in the power supply.

The proposed method masks the operation signatures by simultaneously controlling with a chaotic generator, within a reasonable range, the frequency jitter of the microsystem clock and the value of the power supply of the microsystem. In this way, the power consumption is modified simultaneously in two different ways only partly correlated. The proposed system innovates over the current state of the art by using the entangled clock and power supply scrambling (randomization) of the supply current waveforms of the microsystem. The method and the demonstrative circuit built to validate the concept proved highly efficient against the typical correlation side attack.

Figure 1 (from [1]) shows the block schematic of the protection (1a), the scheme of the pulse shaper (1b), and a scheme for the voltage control circuit (CVR) that powers the microcontroller (1c). Examples of chaotic circuits suitable for this applications were presented in [2,3], with the circuit [2] used here.

Figure 1. Block scheme and examples of block implementations (From [1])

Examples of inter-correlation function analysis for two instructions are shown in fig. 2 (from [1]). Notice that the maximal values of the correlation do not occur for the same instruction, thus creating confusions and insuring an efficient protection.

Figure 2. (From [1])

Fig. 3 (from [1]) shows the maximal values of the inter-correlation functions between eight instructions, when one instruction is unmasked (first column in the table) and the other one is masked (first row).

Figure 3. (From [1])

The manufacturability of the proposed protection system raises no problem. The protection circuits are easy to integrate on the same chip with the microsystem, or in the same package, except one capacitor provided externally.

The market for the system may include a large section of embedded systems for secure applications, as bank and ID cards.

References
[1]. H.-N.L. Teodorescu, E.-F. Iftene, Efficiency of a Combined Protection Method …. Int J Comput Commun, 9(1): 79-84, Feb. 2014
[2]. H.-N. L. Teodorescu, V.P. Cojocaru, Complex Signal Generators … Chaos Theory: Modeling, Simulation and Applications, Skiadas et al. (Eds.), World Scientific, 2011, 423 – 430
[3]. Patent RO127581-A2, Inventor: Teodorescu H N., Assignee: Inst. Computer Science, Romanian Academy